/*
 * machine/sparc/sparc.c - Emulator implementation file
 * 
 * Automatically generated by genemu 0.61 on Tue Mar 19 18:21:34 2002 from:
 *   machine/sparc/sparc-core.spec            (Wed Nov 28 09:33:18 2001)
 *   machine/sparc/sparc.ssl                  (Wed Nov 28 09:33:21 2001)
 */
#include <stdlib.h>
#include <stdio.h>
#include <math.h>
#include "sparc.h"




/* Globals */
long int icount;
int debug;

/* General purpose macros */
#define BITSLICE(x,lo,hi) (((x) & ((1LL<<(hi+1))-1))>>lo)
#define BITSLICEASSN(x,lo,hi,exp) (x=((x)&(~((1LL<<((hi)+1))-1)^((1LL<<(lo))-1)))|\
                                 (((exp)&((1LL<<((hi)-(lo)+1))-1))<<(lo)));
#define ROTATELEFT(x,n,w) (((x)<<(n)) | ((x)>>((w)-(n)) ))
#define ROTATERIGHT(x,n,w) (((x)>>(n)) | ((x)<<((w)-(n)) ))

/* Memory access macros */
#define getMemsint8_t(a)   *((sint8_t *)&mem[a])
#define getMemsint16_t(a)  *((sint16_t *)&mem[a])
#define getMemsint32_t(a)  *((sint32_t *)&mem[a])
#define getMemsint64_t(a)  *((sint64_t *)&mem[a])
#define getMemuint8_t(a)   *((uint8_t *)&mem[a])
#define getMemuint16_t(a)  *((uint16_t *)&mem[a])
#define getMemuint32_t(a)  *((uint32_t *)&mem[a])
#define getMemuint64_t(a)  *((uint64_t *)&mem[a])
#define getMemfloat32_t(a) *((float32_t *)&mem[a])
#define getMemfloat64_t(a) *((float64_t *)&mem[a])
#define getMemfloat128_t(a) *((float128_t *)&mem[a])
#define setMemsint8_t(a,x)   getMemsint8_t(a) = x
#define setMemsint16_t(a,x)  getMemsint16_t(a) = x
#define setMemsint32_t(a,x)  getMemsint32_t(a) = x
#define setMemsint64_t(a,x)  getMemsint64_t(a) = x
#define setMemuint8_t(a,x)   getMemuint8_t(a) = x
#define setMemuint16_t(a,x)  getMemuint16_t(a) = x
#define setMemuint32_t(a,x)  getMemuint32_t(a) = x
#define setMemuint64_t(a,x)  getMemuint64_t(a) = x
#define setMemfloat32_t(a,x) getMemfloat32_t(a) = x
#define setMemfloat64_t(a,x) getMemfloat64_t(a) = x
#define setMemfloat128_t(a,x) getMemfloat128_t(a) = x

#define ADDROF(x) ( (uint32_t)(((char *)&x) - mem) )

static inline sint32_t float32ToSint32( float32_t f ) {
    return *((sint32_t *)&f);
}
static inline sint64_t float64ToSint64( float64_t f ) {
    return *((sint64_t *)&f);
}
static inline float32_t sint32ToFloat32( sint32_t i ) {
    return *((float32_t *)&i);
}
static inline float64_t sint64ToFloat64( sint64_t i ) {
    return *((float64_t *)&i);
}

/* "Default" values */
#define defaultsint8_t 0
#define defaultsint16_t 0
#define defaultsint32_t 0
#define defaultsint64_t 0
#define defaultuint8_t 0
#define defaultuint16_t 0
#define defaultuint32_t 0
#define defaultuint64_t 0
#define defaultfloat32_t 0
#define defaultfloat64_t 0
#define defaultfloat128_t 0

/* Function names */
#define loge(x) log(x)
#define log2(x) log(x)/log(2)
#define arctan(x) atan(x)
#define arcsin(x) asin(x)
#define arccos(x) acos(x)
#define fround(a,b,x) rint(x)


/* Macros and types for NJMC */
#define getDword(pc) getMemuint32_t(pc)
#define getWord(pc) getMemuint16_t(pc)
#define getByte(pc) getMemuint8_t(pc)

#define addressToPC(pc) (pc)
#define doFlagTRAP(c,t) if(c) doTrap(t)
typedef uint32_t dword;

#ifndef HEXCUTOFF
#define HEXCUTOFF 1024
#endif
#define IMMEDTOSTRING( v, x, l ) \
    snprintf( v,l, ((x)>HEXCUTOFF || ((signed)(x))<-HEXCUTOFF)?"0x%x":"%d", x )
#define BADOPCODE(x) *opname = "#ERR#";

/**************** Disassembler core ******************/
static const char *aNames[2] = { "", ",a" };
static const char *cdNames[32] = { "%c0", "%c1", "%c2", "%c3", "%c4", "%c5", "%c6", "%c7", "%c8", "%c9", "%c10", "%c11", "%c12", "%c13", "%c14", "%c15", "%c16", "%c17", "%c18", "%c19", "%c20", "%c21", "%c22", "%c23", "%c24", "%c25", "%c26", "%c27", "%c28", "%c29", "%c30", "%c31" };
static const char *fddNames[32] = { "%f0to1", "a", "%f2to3", "b", "%f4to5", "c", "%f6to7", "d", "%f8to9", "e", "%f10to11", "f", "%f12to13", "g", "%f14to15", "h", "%f16to17", "i", "%f18to19", "j", "%f20to21", "k", "%f22to23", "l", "%f24to25", "m", "%f26to27", "n", "%f28to29", "o", "%f30to31", "p" };
static const char *fdqNames[32] = { "%f0to3", "q", "r", "s", "%f4to7", "t", "u", "v", "%f8to11", "w", "x", "y", "%f12to15", "z", "A", "B", "%f16to19", "C", "D", "E", "%f20to23", "F", "G", "H", "%f24to27", "I", "J", "K", "%f28to31", "L", "M", "N" };
static const char *fdsNames[32] = { "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31" };
static const char *fs1dNames[32] = { "%f0to1", "a", "%f2to3", "b", "%f4to5", "c", "%f6to7", "d", "%f8to9", "e", "%f10to11", "f", "%f12to13", "g", "%f14to15", "h", "%f16to17", "i", "%f18to19", "j", "%f20to21", "k", "%f22to23", "l", "%f24to25", "m", "%f26to27", "n", "%f28to29", "o", "%f30to31", "p" };
static const char *fs1qNames[32] = { "%f0to3", "q", "r", "s", "%f4to7", "t", "u", "v", "%f8to11", "w", "x", "y", "%f12to15", "z", "A", "B", "%f16to19", "C", "D", "E", "%f20to23", "F", "G", "H", "%f24to27", "I", "J", "K", "%f28to31", "L", "M", "N" };
static const char *fs1sNames[32] = { "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31" };
static const char *fs2dNames[32] = { "%f0to1", "a", "%f2to3", "b", "%f4to5", "c", "%f6to7", "d", "%f8to9", "e", "%f10to11", "f", "%f12to13", "g", "%f14to15", "h", "%f16to17", "i", "%f18to19", "j", "%f20to21", "k", "%f22to23", "l", "%f24to25", "m", "%f26to27", "n", "%f28to29", "o", "%f30to31", "p" };
static const char *fs2qNames[32] = { "%f0to3", "q", "r", "s", "%f4to7", "t", "u", "v", "%f8to11", "w", "x", "y", "%f12to15", "z", "A", "B", "%f16to19", "C", "D", "E", "%f20to23", "F", "G", "H", "%f24to27", "I", "J", "K", "%f28to31", "L", "M", "N" };
static const char *fs2sNames[32] = { "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31" };
static const char *rdNames[32] = { "%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7" };
static const char *rs1Names[32] = { "%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7" };
static const char *rs2Names[32] = { "%g0", "%g1", "%g2", "%g3", "%g4", "%g5", "%g6", "%g7", "%o0", "%o1", "%o2", "%o3", "%o4", "%o5", "%sp", "%o7", "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7", "%i0", "%i1", "%i2", "%i3", "%i4", "%i5", "%fp", "%i7" };
sint32_t disassembleaddress_( int pc, char * buf, size_t buflen, char ** opname )
{
sint32_t nextPC;
match [nextPC] pc to
| "dispA" (rs1, simm13) => {
char tmp2[15];
IMMEDTOSTRING( tmp2, simm13, 15 );
snprintf( buf, buflen, "%s + %s", rs1Names[rs1], tmp2);
if( opname ) *opname = "dispA";
}
| "absoluteA" (simm13) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, simm13, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "absoluteA";
}
| "indexA" (rs1, rs2) => {
snprintf( buf, buflen, "%s + %s", rs1Names[rs1], rs2Names[rs2]);
if( opname ) *opname = "indexA";
}
| "indirectA" (rs1) => {
snprintf( buf, buflen, "%s", rs1Names[rs1]);
if( opname ) *opname = "indirectA";
}
else { BADOPCODE(pc); };
endmatch
return nextPC;
}
sint32_t disassemblereg_or_imm( int pc, char * buf, size_t buflen, char ** opname )
{
sint32_t nextPC;
match [nextPC] pc to
| "imode" (simm13) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, simm13, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "imode";
}
| "rmode" (rs2) => {
snprintf( buf, buflen, "%s", rs2Names[rs2]);
if( opname ) *opname = "rmode";
}
else { BADOPCODE(pc); };
endmatch
return nextPC;
}
sint32_t disassembleregaddr( int pc, char * buf, size_t buflen, char ** opname )
{
sint32_t nextPC;
match [nextPC] pc to
| "indexR" (rs1, rs2) => {
snprintf( buf, buflen, "%s + %s", rs1Names[rs1], rs2Names[rs2]);
if( opname ) *opname = "indexR";
}
| "indirectR" (rs1) => {
snprintf( buf, buflen, "%s", rs1Names[rs1]);
if( opname ) *opname = "indirectR";
}
else { BADOPCODE(pc); };
endmatch
return nextPC;
}


int disassembleInstruction( int pc, char *buf, size_t buflen, char **opname )
{
    sint32_t nextPC;
match [nextPC] pc to
| "ADD" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ADD";
}
| "ADDX" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ADDX";
}
| "WRASR" (rs1, reg_or_imm, rdi) => {
char tmp2[7];
char tmp3[15];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
IMMEDTOSTRING( tmp3, rdi, 15 );
snprintf( buf, buflen, "%s, %s, %%asr%s", rs1Names[rs1], tmp2, tmp3);
if( opname ) *opname = "WRASR";
}
| "WRY" (rs1, reg_or_imm) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %%y", rs1Names[rs1], tmp2);
if( opname ) *opname = "WRY";
}
| "ADDXcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ADDXcc";
}
| "ADDcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ADDcc";
}
| "AND" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "AND";
}
| "ANDN" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ANDN";
}
| "ANDNcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ANDNcc";
}
| "ANDcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ANDcc";
}
| "BA" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BA";
}
| "BA,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BA,a";
}
| "BCC" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BCC";
}
| "BCC,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BCC,a";
}
| "BCS" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BCS";
}
| "BCS,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BCS,a";
}
| "BE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BE";
}
| "BE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BE,a";
}
| "BG" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BG";
}
| "BG,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BG,a";
}
| "BGE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BGE";
}
| "BGE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BGE,a";
}
| "BGU" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BGU";
}
| "BGU,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BGU,a";
}
| "BL" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BL";
}
| "BL,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BL,a";
}
| "BLE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BLE";
}
| "BLE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BLE,a";
}
| "BLEU" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BLEU";
}
| "BLEU,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BLEU,a";
}
| "BN" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BN";
}
| "BN,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BN,a";
}
| "BNE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BNE";
}
| "BNE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BNE,a";
}
| "BNEG" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BNEG";
}
| "BNEG,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BNEG,a";
}
| "BPOS" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BPOS";
}
| "BPOS,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BPOS,a";
}
| "BVC" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BVC";
}
| "BVC,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BVC,a";
}
| "BVS" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BVS";
}
| "BVS,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "BVS,a";
}
| "CB0" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB0";
}
| "CB0,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB0,a";
}
| "CB01" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB01";
}
| "CB01,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB01,a";
}
| "CB012" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB012";
}
| "CB012,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB012,a";
}
| "CB013" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB013";
}
| "CB013,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB013,a";
}
| "CB02" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB02";
}
| "CB02,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB02,a";
}
| "CB023" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB023";
}
| "CB023,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB023,a";
}
| "CB03" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB03";
}
| "CB03,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB03,a";
}
| "CB1" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB1";
}
| "CB1,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB1,a";
}
| "CB12" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB12";
}
| "CB12,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB12,a";
}
| "CB123" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB123";
}
| "CB123,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB123,a";
}
| "CB13" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB13";
}
| "CB13,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB13,a";
}
| "CB2" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB2";
}
| "CB2,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB2,a";
}
| "CB23" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB23";
}
| "CB23,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB23,a";
}
| "CB3" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB3";
}
| "CB3,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CB3,a";
}
| "CBA" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CBA";
}
| "CBA,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CBA,a";
}
| "CBN" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CBN";
}
| "CBN,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "CBN,a";
}
| "FABSs" (fs2s, fds) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FABSs";
}
| "FADDd" (fs1d, fs2d, fdd) => {
snprintf( buf, buflen, "%s, %s, %s", fs1dNames[fs1d], fs2dNames[fs2d], fddNames[fdd]);
if( opname ) *opname = "FADDd";
}
| "FADDq" (fs1q, fs2q, fdq) => {
snprintf( buf, buflen, "%s, %s, %s", fs1qNames[fs1q], fs2qNames[fs2q], fdqNames[fdq]);
if( opname ) *opname = "FADDq";
}
| "FADDs" (fs1s, fs2s, fds) => {
snprintf( buf, buflen, "%s, %s, %s", fs1sNames[fs1s], fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FADDs";
}
| "FBA" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBA";
}
| "FBA,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBA,a";
}
| "FBE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBE";
}
| "FBE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBE,a";
}
| "FBG" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBG";
}
| "FBG,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBG,a";
}
| "FBGE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBGE";
}
| "FBGE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBGE,a";
}
| "FBL" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBL";
}
| "FBL,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBL,a";
}
| "FBLE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBLE";
}
| "FBLE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBLE,a";
}
| "FBLG" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBLG";
}
| "FBLG,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBLG,a";
}
| "FBN" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBN";
}
| "FBN,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBN,a";
}
| "FBNE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBNE";
}
| "FBNE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBNE,a";
}
| "FBO" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBO";
}
| "FBO,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBO,a";
}
| "FBU" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBU";
}
| "FBU,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBU,a";
}
| "FBUE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUE";
}
| "FBUE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUE,a";
}
| "FBUG" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUG";
}
| "FBUG,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUG,a";
}
| "FBUGE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUGE";
}
| "FBUGE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUGE,a";
}
| "FBUL" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUL";
}
| "FBUL,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBUL,a";
}
| "FBULE" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBULE";
}
| "FBULE,a" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FBULE,a";
}
| "FCMPEd" (fs1d, fs2d) => {
snprintf( buf, buflen, "%s, %s", fs1dNames[fs1d], fs2dNames[fs2d]);
if( opname ) *opname = "FCMPEd";
}
| "FCMPEq" (fs1q, fs2q) => {
snprintf( buf, buflen, "%s, %s", fs1qNames[fs1q], fs2qNames[fs2q]);
if( opname ) *opname = "FCMPEq";
}
| "FCMPEs" (fs1s, fs2s) => {
snprintf( buf, buflen, "%s, %s", fs1sNames[fs1s], fs2sNames[fs2s]);
if( opname ) *opname = "FCMPEs";
}
| "FCMPd" (fs1d, fs2d) => {
snprintf( buf, buflen, "%s, %s", fs1dNames[fs1d], fs2dNames[fs2d]);
if( opname ) *opname = "FCMPd";
}
| "FCMPq" (fs1q, fs2q) => {
snprintf( buf, buflen, "%s, %s", fs1qNames[fs1q], fs2qNames[fs2q]);
if( opname ) *opname = "FCMPq";
}
| "FCMPs" (fs1s, fs2s) => {
snprintf( buf, buflen, "%s, %s", fs1sNames[fs1s], fs2sNames[fs2s]);
if( opname ) *opname = "FCMPs";
}
| "FDIVd" (fs1d, fs2d, fdd) => {
snprintf( buf, buflen, "%s, %s, %s", fs1dNames[fs1d], fs2dNames[fs2d], fddNames[fdd]);
if( opname ) *opname = "FDIVd";
}
| "FDIVq" (fs1q, fs2q, fdq) => {
snprintf( buf, buflen, "%s, %s, %s", fs1qNames[fs1q], fs2qNames[fs2q], fdqNames[fdq]);
if( opname ) *opname = "FDIVq";
}
| "FDIVs" (fs1s, fs2s, fds) => {
snprintf( buf, buflen, "%s, %s, %s", fs1sNames[fs1s], fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FDIVs";
}
| "FLUSH" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "FLUSH";
}
| "FMOVs" (fs2s, fds) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FMOVs";
}
| "FMULd" (fs1d, fs2d, fdd) => {
snprintf( buf, buflen, "%s, %s, %s", fs1dNames[fs1d], fs2dNames[fs2d], fddNames[fdd]);
if( opname ) *opname = "FMULd";
}
| "FMULq" (fs1q, fs2q, fdq) => {
snprintf( buf, buflen, "%s, %s, %s", fs1qNames[fs1q], fs2qNames[fs2q], fdqNames[fdq]);
if( opname ) *opname = "FMULq";
}
| "FMULs" (fs1s, fs2s, fds) => {
snprintf( buf, buflen, "%s, %s, %s", fs1sNames[fs1s], fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FMULs";
}
| "FNEGs" (fs2s, fds) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FNEGs";
}
| "FSQRTd" (fs2d, fdd) => {
snprintf( buf, buflen, "%s, %s", fs2dNames[fs2d], fddNames[fdd]);
if( opname ) *opname = "FSQRTd";
}
| "FSQRTq" (fs2q, fdq) => {
snprintf( buf, buflen, "%s, %s", fs2qNames[fs2q], fdqNames[fdq]);
if( opname ) *opname = "FSQRTq";
}
| "FSQRTs" (fs2s, fds) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FSQRTs";
}
| "FSUBd" (fs1d, fs2d, fdd) => {
snprintf( buf, buflen, "%s, %s, %s", fs1dNames[fs1d], fs2dNames[fs2d], fddNames[fdd]);
if( opname ) *opname = "FSUBd";
}
| "FSUBq" (fs1q, fs2q, fdq) => {
snprintf( buf, buflen, "%s, %s, %s", fs1qNames[fs1q], fs2qNames[fs2q], fdqNames[fdq]);
if( opname ) *opname = "FSUBq";
}
| "FSUBs" (fs1s, fs2s, fds) => {
snprintf( buf, buflen, "%s, %s, %s", fs1sNames[fs1s], fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FSUBs";
}
| "FdMULq" (fs1q, fs2q, fdq) => {
snprintf( buf, buflen, "%s, %s, %s", fs1qNames[fs1q], fs2qNames[fs2q], fdqNames[fdq]);
if( opname ) *opname = "FdMULq";
}
| "FdTOi" (fs2d, fds) => {
snprintf( buf, buflen, "%s, %s", fs2dNames[fs2d], fdsNames[fds]);
if( opname ) *opname = "FdTOi";
}
| "FdTOq" (fs2d, fdq) => {
snprintf( buf, buflen, "%s, %s", fs2dNames[fs2d], fdqNames[fdq]);
if( opname ) *opname = "FdTOq";
}
| "FdTOs" (fs2d, fds) => {
snprintf( buf, buflen, "%s, %s", fs2dNames[fs2d], fdsNames[fds]);
if( opname ) *opname = "FdTOs";
}
| "FiTOd" (fs2s, fdd) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fddNames[fdd]);
if( opname ) *opname = "FiTOd";
}
| "FiTOq" (fs2s, fdq) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdqNames[fdq]);
if( opname ) *opname = "FiTOq";
}
| "FiTOs" (fs2s, fds) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FiTOs";
}
| "FqTOd" (fs2q, fdd) => {
snprintf( buf, buflen, "%s, %s", fs2qNames[fs2q], fddNames[fdd]);
if( opname ) *opname = "FqTOd";
}
| "FqTOi" (fs2q, fds) => {
snprintf( buf, buflen, "%s, %s", fs2qNames[fs2q], fdsNames[fds]);
if( opname ) *opname = "FqTOi";
}
| "FqTOs" (fs2q, fds) => {
snprintf( buf, buflen, "%s, %s", fs2qNames[fs2q], fdsNames[fds]);
if( opname ) *opname = "FqTOs";
}
| "FsMULd" (fs1d, fs2d, fdd) => {
snprintf( buf, buflen, "%s, %s, %s", fs1dNames[fs1d], fs2dNames[fs2d], fddNames[fdd]);
if( opname ) *opname = "FsMULd";
}
| "FsTOd" (fs2s, fdd) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fddNames[fdd]);
if( opname ) *opname = "FsTOd";
}
| "FsTOi" (fs2s, fds) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdsNames[fds]);
if( opname ) *opname = "FsTOi";
}
| "FsTOq" (fs2s, fdq) => {
snprintf( buf, buflen, "%s, %s", fs2sNames[fs2s], fdqNames[fdq]);
if( opname ) *opname = "FsTOq";
}
| "JMPL" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s, %s", tmp1, rdNames[rd]);
if( opname ) *opname = "JMPL";
}
| "LD" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LD";
}
| "LDA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDA";
}
| "LDC" (address_, cd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, cdNames[cd]);
if( opname ) *opname = "LDC";
}
| "LDCSR" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %%csr", tmp1);
if( opname ) *opname = "LDCSR";
}
| "LDD" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LDD";
}
| "LDDA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDDA";
}
| "LDDC" (address_, cd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, cdNames[cd]);
if( opname ) *opname = "LDDC";
}
| "LDDF" (address_, fdd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, fddNames[fdd]);
if( opname ) *opname = "LDDF";
}
| "LDF" (address_, fds) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, fdsNames[fds]);
if( opname ) *opname = "LDF";
}
| "LDFSR" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %%fsr", tmp1);
if( opname ) *opname = "LDFSR";
}
| "LDSB" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LDSB";
}
| "LDSBA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDSBA";
}
| "LDSH" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LDSH";
}
| "LDSHA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDSHA";
}
| "LDSTUB" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LDSTUB";
}
| "LDSTUBA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDSTUBA";
}
| "LDUB" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LDUB";
}
| "LDUBA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDUBA";
}
| "LDUH" (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "LDUH";
}
| "LDUHA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "LDUHA";
}
| "MULScc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "MULScc";
}
| "NOP" () => {
buf[0] = '\0';
if( opname ) *opname = "NOP";
}
| "OR" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "OR";
}
| "ORN" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ORN";
}
| "ORNcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ORNcc";
}
| "ORcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "ORcc";
}
| "RDASR" (rs1i, rd) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, rs1i, 15 );
snprintf( buf, buflen, "%%asr%s, %s", tmp1, rdNames[rd]);
if( opname ) *opname = "RDASR";
}
| "RDPSR" (rd) => {
snprintf( buf, buflen, "%%psr, %s", rdNames[rd]);
if( opname ) *opname = "RDPSR";
}
| "RDTBR" (rd) => {
snprintf( buf, buflen, "%%tbr, %s", rdNames[rd]);
if( opname ) *opname = "RDTBR";
}
| "RDWIM" (rd) => {
snprintf( buf, buflen, "%%wim, %s", rdNames[rd]);
if( opname ) *opname = "RDWIM";
}
| "RDY" (rd) => {
snprintf( buf, buflen, "%%y,   %s", rdNames[rd]);
if( opname ) *opname = "RDY";
}
| "RESTORE" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "RESTORE";
}
| "RETT" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "RETT";
}
| "SAVE" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SAVE";
}
| "SDIV" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SDIV";
}
| "SDIVcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SDIVcc";
}
| "SLL" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SLL";
}
| "SMUL" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SMUL";
}
| "SMULcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SMULcc";
}
| "SRA" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SRA";
}
| "SRL" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SRL";
}
| "ST" (rd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", rdNames[rd], tmp2);
if( opname ) *opname = "ST";
}
| "STA" (rd, regaddr, asi) => {
char tmp2[10];
char tmp3[15];
disassembleregaddr( regaddr, tmp2, sizeof(tmp2), NULL );
IMMEDTOSTRING( tmp3, asi, 15 );
snprintf( buf, buflen, "%s, [%s]%s", rdNames[rd], tmp2, tmp3);
if( opname ) *opname = "STA";
}
| "STB" (rd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", rdNames[rd], tmp2);
if( opname ) *opname = "STB";
}
| "STBA" (rd, regaddr, asi) => {
char tmp2[10];
char tmp3[15];
disassembleregaddr( regaddr, tmp2, sizeof(tmp2), NULL );
IMMEDTOSTRING( tmp3, asi, 15 );
snprintf( buf, buflen, "%s, [%s]%s", rdNames[rd], tmp2, tmp3);
if( opname ) *opname = "STBA";
}
| "STBAR" () => {
buf[0] = '\0';
if( opname ) *opname = "STBAR";
}
| "STC" (cd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", cdNames[cd], tmp2);
if( opname ) *opname = "STC";
}
| "STCSR" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%%csr, [%s]", tmp1);
if( opname ) *opname = "STCSR";
}
| "STD" (rd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", rdNames[rd], tmp2);
if( opname ) *opname = "STD";
}
| "STDA" (rd, regaddr, asi) => {
char tmp2[10];
char tmp3[15];
disassembleregaddr( regaddr, tmp2, sizeof(tmp2), NULL );
IMMEDTOSTRING( tmp3, asi, 15 );
snprintf( buf, buflen, "%s, [%s]%s", rdNames[rd], tmp2, tmp3);
if( opname ) *opname = "STDA";
}
| "STDC" (cd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", cdNames[cd], tmp2);
if( opname ) *opname = "STDC";
}
| "STDCQ" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%%cq,  [%s]", tmp1);
if( opname ) *opname = "STDCQ";
}
| "STDF" (fdd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", fddNames[fdd], tmp2);
if( opname ) *opname = "STDF";
}
| "STDFQ" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%%fq,  [%s]", tmp1);
if( opname ) *opname = "STDFQ";
}
| "STF" (fds, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", fdsNames[fds], tmp2);
if( opname ) *opname = "STF";
}
| "STFSR" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%%fsr, [%s]", tmp1);
if( opname ) *opname = "STFSR";
}
| "STH" (rd, address_) => {
char tmp2[13];
disassembleaddress_( address_, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, [%s]", rdNames[rd], tmp2);
if( opname ) *opname = "STH";
}
| "STHA" (rd, regaddr, asi) => {
char tmp2[10];
char tmp3[15];
disassembleregaddr( regaddr, tmp2, sizeof(tmp2), NULL );
IMMEDTOSTRING( tmp3, asi, 15 );
snprintf( buf, buflen, "%s, [%s]%s", rdNames[rd], tmp2, tmp3);
if( opname ) *opname = "STHA";
}
| "SUB" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SUB";
}
| "SUBX" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SUBX";
}
| "SUBXcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SUBXcc";
}
| "SUBcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "SUBcc";
}
| "SWAP." (address_, rd) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "[%s], %s", tmp1, rdNames[rd]);
if( opname ) *opname = "SWAP.";
}
| "SWAPA" (regaddr, asi, rd) => {
char tmp1[10];
char tmp2[15];
disassembleregaddr( regaddr, tmp1, sizeof(tmp1), NULL );
IMMEDTOSTRING( tmp2, asi, 15 );
snprintf( buf, buflen, "[%s]%s, %s", tmp1, tmp2, rdNames[rd]);
if( opname ) *opname = "SWAPA";
}
| "TA" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TA";
}
| "TADDcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "TADDcc";
}
| "TADDccTV" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "TADDccTV";
}
| "TCC" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TCC";
}
| "TCS" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TCS";
}
| "TE" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TE";
}
| "TG" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TG";
}
| "TGE" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TGE";
}
| "TGU" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TGU";
}
| "TL" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TL";
}
| "TLE" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TLE";
}
| "TLEU" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TLEU";
}
| "TN" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TN";
}
| "TNE" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TNE";
}
| "TNEG" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TNEG";
}
| "TPOS" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TPOS";
}
| "TSUBcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "TSUBcc";
}
| "TSUBccTV" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "TSUBccTV";
}
| "TVC" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TVC";
}
| "TVS" (address_) => {
char tmp1[13];
disassembleaddress_( address_, tmp1, sizeof(tmp1), NULL );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "TVS";
}
| "UDIV" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "UDIV";
}
| "UDIVcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "UDIVcc";
}
| "UMUL" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "UMUL";
}
| "UMULcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "UMULcc";
}
| "UNIMP" (imm22) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, imm22, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "UNIMP";
}
| "WRPSR" (rs1, reg_or_imm) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %%psr", rs1Names[rs1], tmp2);
if( opname ) *opname = "WRPSR";
}
| "WRTBR" (rs1, reg_or_imm) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %%tbr", rs1Names[rs1], tmp2);
if( opname ) *opname = "WRTBR";
}
| "WRWIM" (rs1, reg_or_imm) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %%wim", rs1Names[rs1], tmp2);
if( opname ) *opname = "WRWIM";
}
| "XNOR" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "XNOR";
}
| "XNORcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "XNORcc";
}
| "XOR" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "XOR";
}
| "XORcc" (rs1, reg_or_imm, rd) => {
char tmp2[7];
disassemblereg_or_imm( reg_or_imm, tmp2, sizeof(tmp2), NULL );
snprintf( buf, buflen, "%s, %s, %s", rs1Names[rs1], tmp2, rdNames[rd]);
if( opname ) *opname = "XORcc";
}
| "call__" (reloc) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, reloc, 15 );
snprintf( buf, buflen, "%s", tmp1);
if( opname ) *opname = "call__";
}
| "sethi" (val, rd) => {
char tmp1[15];
IMMEDTOSTRING( tmp1, val, 15 );
snprintf( buf, buflen, "%%hi(%s), %s", tmp1, rdNames[rd]);
if( opname ) *opname = "sethi";
}
else { BADOPCODE(pc); };
endmatch
return nextPC;

}

disasm_fmt_t defDisasmFmt = { "%08X: ", "%02x ", 1, 6, 10, 32, true, false };

int sprintDisassembleInst( int pc, char *buf, int buflen,
                           disasm_fmt_t &fmt = defDisasmFmt )        
{
    char operands[80];
    char *opname;
    int pos = 0;
    int npc = disassembleInstruction( pc, operands,
                                      sizeof(operands), &opname );
    pos += snprintf( buf+pos, buflen-pos, fmt.addrfmt, pc );
    if( fmt.showHex ) {
        for( int i=0; i < fmt.hexlen; i+=fmt.hexwidth, pc+=fmt.hexwidth ) {
            if( pc < npc )                                                 
                pos += snprintf( buf+pos, buflen-pos, fmt.hexfmt,
                                 (int)mem[pc]&((1<<(8*fmt.hexwidth))-1) );
            else                                                           
                pos += snprintf( buf+pos, buflen-pos, "%*c",
            fmt.hexwidth*2+1, ' ' );   
        }
    }    
    pos += snprintf( buf+pos, buflen-pos, "%-*s", fmt.opnamelen, opname );
    pos += snprintf( buf+pos, buflen-pos, " " );
    pos += snprintf( buf+pos, buflen-pos, "%-*s", fmt.operandlen, operands );
    return npc;
}


void unimplemented( int pc ) {
    char buf[80];
    sprintDisassembleInst( pc, buf, sizeof(buf) );
    fprintf(stderr, "Unimplmented instruction: %s\n", buf );
    exit(1);
}

/************** Register definitions **************/
RegisterFile regs;

float64_t * regs_fdd[32] = { &(regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1), NULL, &(regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3), NULL, &(regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5), NULL, &(regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7), NULL, &(regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9), NULL, &(regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11), NULL, &(regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13), NULL, &(regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15), NULL, &(regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17), NULL, &(regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19), NULL, &(regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21), NULL, &(regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23), NULL, &(regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25), NULL, &(regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27), NULL, &(regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29), NULL, &(regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31), NULL };
float128_t * regs_fdq[32] = { &(regs.r_f0to3_un.r_f0to3), NULL, NULL, NULL, &(regs.r_f4to7_un.r_f4to7), NULL, NULL, NULL, &(regs.r_f8to11_un.r_f8to11), NULL, NULL, NULL, &(regs.r_f12to15_un.r_f12to15), NULL, NULL, NULL, &(regs.r_f16to19_un.r_f16to19), NULL, NULL, NULL, &(regs.r_f20to23_un.r_f20to23), NULL, NULL, NULL, &(regs.r_f24to27_un.r_f24to27), NULL, NULL, NULL, &(regs.r_f28to31_un.r_f28to31), NULL, NULL, NULL };
float32_t * regs_fds[32] = { &(regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1_str.r_f0), &(regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1_str.r_f1), &(regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3_str.r_f2), &(regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3_str.r_f3), &(regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5_str.r_f4), &(regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5_str.r_f5), &(regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7_str.r_f6), &(regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7_str.r_f7), &(regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9_str.r_f8), &(regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9_str.r_f9), &(regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11_str.r_f10), &(regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11_str.r_f11), &(regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13_str.r_f12), &(regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13_str.r_f13), &(regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15_str.r_f14), &(regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15_str.r_f15), &(regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17_str.r_f16), &(regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17_str.r_f17), &(regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19_str.r_f18), &(regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19_str.r_f19), &(regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21_str.r_f20), &(regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21_str.r_f21), &(regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23_str.r_f22), &(regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23_str.r_f23), &(regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25_str.r_f24), &(regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25_str.r_f25), &(regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27_str.r_f26), &(regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27_str.r_f27), &(regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29_str.r_f28), &(regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29_str.r_f29), &(regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31_str.r_f30), &(regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31_str.r_f31) };


/**************** Register Dumping ****************/
void dumpControlRegisters( FILE * out )
{
fprintf( out, "%%CWP: %08x %%FGF: %s %%FLF: %s %%FSR: %08x %%FZF: %s %%PSR: %08x %%TBR: %08x %%WIM: %08x \n", regs.r_CWP, regs.r_FGF? "true " : "false", regs.r_FLF? "true " : "false", regs.r_FSR, regs.r_FZF? "true " : "false", regs.r_PSR, regs.r_TBR, regs.r_WIM);
fprintf( out, "%%Y: %08x %%npc: %08x %%pc: %08x Flags: %c%c%c%c%c \n", regs.r_Y, regs.r_npc, regs.r_pc, regs.r_AF? 'A' : '-', regs.r_CF? 'C' : '-', regs.r_NF? 'N' : '-', regs.r_OF? 'O' : '-', regs.r_ZF? 'Z' : '-');
}
void dumpMainRegisters( FILE * out )
{
fprintf( out, "%%g0: %08x %%g1: %08x %%g2: %08x %%g3: %08x %%g4: %08x %%g5: %08x %%g6: %08x %%g7: %08x \n", regs.rd[0], regs.rd[1], regs.rd[2], regs.rd[3], regs.rd[4], regs.rd[5], regs.rd[6], regs.rd[7]);
fprintf( out, "%%o0: %08x %%o1: %08x %%o2: %08x %%o3: %08x %%o4: %08x %%o5: %08x %%sp: %08x %%o7: %08x \n", regs.rd[8], regs.rd[9], regs.rd[10], regs.rd[11], regs.rd[12], regs.rd[13], regs.rd[14], regs.rd[15]);
fprintf( out, "%%l0: %08x %%l1: %08x %%l2: %08x %%l3: %08x %%l4: %08x %%l5: %08x %%l6: %08x %%l7: %08x \n", regs.rd[16], regs.rd[17], regs.rd[18], regs.rd[19], regs.rd[20], regs.rd[21], regs.rd[22], regs.rd[23]);
fprintf( out, "%%i0: %08x %%i1: %08x %%i2: %08x %%i3: %08x %%i4: %08x %%i5: %08x %%fp: %08x %%i7: %08x \n", regs.rd[24], regs.rd[25], regs.rd[26], regs.rd[27], regs.rd[28], regs.rd[29], regs.rd[30], regs.rd[31]);
fprintf( out, "%%CWP: %08x %%FGF: %s %%FLF: %s %%FSR: %08x %%FZF: %s %%PSR: %08x %%TBR: %08x %%WIM: %08x \n", regs.r_CWP, regs.r_FGF? "true " : "false", regs.r_FLF? "true " : "false", regs.r_FSR, regs.r_FZF? "true " : "false", regs.r_PSR, regs.r_TBR, regs.r_WIM);
fprintf( out, "%%Y: %08x %%npc: %08x %%pc: %08x Flags: %c%c%c%c%c \n", regs.r_Y, regs.r_npc, regs.r_pc, regs.r_AF? 'A' : '-', regs.r_CF? 'C' : '-', regs.r_NF? 'N' : '-', regs.r_OF? 'O' : '-', regs.r_ZF? 'Z' : '-');
}
void dumpFloatRegisters( FILE * out )
{
fprintf( out, "%%f0: %+.8e %%f1: %+.8e %%f2: %+.8e %%f3: %+.8e %%f4: %+.8e %%f5: %+.8e \n", regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1_str.r_f0, regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1_str.r_f1, regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3_str.r_f2, regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3_str.r_f3, regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5_str.r_f4, regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5_str.r_f5);
fprintf( out, "%%f6: %+.8e %%f7: %+.8e %%f8: %+.8e %%f9: %+.8e %%f10: %+.8e \n", regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7_str.r_f6, regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7_str.r_f7, regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9_str.r_f8, regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9_str.r_f9, regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11_str.r_f10);
fprintf( out, "%%f11: %+.8e %%f12: %+.8e %%f13: %+.8e %%f14: %+.8e %%f15: %+.8e \n", regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11_str.r_f11, regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13_str.r_f12, regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13_str.r_f13, regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15_str.r_f14, regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15_str.r_f15);
fprintf( out, "%%f16: %+.8e %%f17: %+.8e %%f18: %+.8e %%f19: %+.8e %%f20: %+.8e \n", regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17_str.r_f16, regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17_str.r_f17, regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19_str.r_f18, regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19_str.r_f19, regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21_str.r_f20);
fprintf( out, "%%f21: %+.8e %%f22: %+.8e %%f23: %+.8e %%f24: %+.8e %%f25: %+.8e \n", regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21_str.r_f21, regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23_str.r_f22, regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23_str.r_f23, regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25_str.r_f24, regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25_str.r_f25);
fprintf( out, "%%f26: %+.8e %%f27: %+.8e %%f28: %+.8e %%f29: %+.8e %%f30: %+.8e \n", regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27_str.r_f26, regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27_str.r_f27, regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29_str.r_f28, regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29_str.r_f29, regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31_str.r_f30);
fprintf( out, "%%f31: %+.8e \n", regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31_str.r_f31);
}
void dumpAllRegisters( FILE * out )
{
fprintf( out, "%%g0: %08x %%g1: %08x %%g2: %08x %%g3: %08x %%g4: %08x %%g5: %08x %%g6: %08x %%g7: %08x \n", regs.rd[0], regs.rd[1], regs.rd[2], regs.rd[3], regs.rd[4], regs.rd[5], regs.rd[6], regs.rd[7]);
fprintf( out, "%%o0: %08x %%o1: %08x %%o2: %08x %%o3: %08x %%o4: %08x %%o5: %08x %%sp: %08x %%o7: %08x \n", regs.rd[8], regs.rd[9], regs.rd[10], regs.rd[11], regs.rd[12], regs.rd[13], regs.rd[14], regs.rd[15]);
fprintf( out, "%%l0: %08x %%l1: %08x %%l2: %08x %%l3: %08x %%l4: %08x %%l5: %08x %%l6: %08x %%l7: %08x \n", regs.rd[16], regs.rd[17], regs.rd[18], regs.rd[19], regs.rd[20], regs.rd[21], regs.rd[22], regs.rd[23]);
fprintf( out, "%%i0: %08x %%i1: %08x %%i2: %08x %%i3: %08x %%i4: %08x %%i5: %08x %%fp: %08x %%i7: %08x \n", regs.rd[24], regs.rd[25], regs.rd[26], regs.rd[27], regs.rd[28], regs.rd[29], regs.rd[30], regs.rd[31]);
fprintf( out, "%%CWP: %08x %%FGF: %s %%FLF: %s %%FSR: %08x %%FZF: %s %%PSR: %08x %%TBR: %08x %%WIM: %08x \n", regs.r_CWP, regs.r_FGF? "true " : "false", regs.r_FLF? "true " : "false", regs.r_FSR, regs.r_FZF? "true " : "false", regs.r_PSR, regs.r_TBR, regs.r_WIM);
fprintf( out, "%%Y: %08x %%npc: %08x %%pc: %08x Flags: %c%c%c%c%c \n", regs.r_Y, regs.r_npc, regs.r_pc, regs.r_AF? 'A' : '-', regs.r_CF? 'C' : '-', regs.r_NF? 'N' : '-', regs.r_OF? 'O' : '-', regs.r_ZF? 'Z' : '-');
fprintf( out, "%%f0: %+.8e %%f1: %+.8e %%f2: %+.8e %%f3: %+.8e %%f4: %+.8e %%f5: %+.8e \n", regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1_str.r_f0, regs.r_f0to3_un.r_f0to3_str.r_f0to1_un.r_f0to1_str.r_f1, regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3_str.r_f2, regs.r_f0to3_un.r_f0to3_str.r_f2to3_un.r_f2to3_str.r_f3, regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5_str.r_f4, regs.r_f4to7_un.r_f4to7_str.r_f4to5_un.r_f4to5_str.r_f5);
fprintf( out, "%%f6: %+.8e %%f7: %+.8e %%f8: %+.8e %%f9: %+.8e %%f10: %+.8e \n", regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7_str.r_f6, regs.r_f4to7_un.r_f4to7_str.r_f6to7_un.r_f6to7_str.r_f7, regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9_str.r_f8, regs.r_f8to11_un.r_f8to11_str.r_f8to9_un.r_f8to9_str.r_f9, regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11_str.r_f10);
fprintf( out, "%%f11: %+.8e %%f12: %+.8e %%f13: %+.8e %%f14: %+.8e %%f15: %+.8e \n", regs.r_f8to11_un.r_f8to11_str.r_f10to11_un.r_f10to11_str.r_f11, regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13_str.r_f12, regs.r_f12to15_un.r_f12to15_str.r_f12to13_un.r_f12to13_str.r_f13, regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15_str.r_f14, regs.r_f12to15_un.r_f12to15_str.r_f14to15_un.r_f14to15_str.r_f15);
fprintf( out, "%%f16: %+.8e %%f17: %+.8e %%f18: %+.8e %%f19: %+.8e %%f20: %+.8e \n", regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17_str.r_f16, regs.r_f16to19_un.r_f16to19_str.r_f16to17_un.r_f16to17_str.r_f17, regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19_str.r_f18, regs.r_f16to19_un.r_f16to19_str.r_f18to19_un.r_f18to19_str.r_f19, regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21_str.r_f20);
fprintf( out, "%%f21: %+.8e %%f22: %+.8e %%f23: %+.8e %%f24: %+.8e %%f25: %+.8e \n", regs.r_f20to23_un.r_f20to23_str.r_f20to21_un.r_f20to21_str.r_f21, regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23_str.r_f22, regs.r_f20to23_un.r_f20to23_str.r_f22to23_un.r_f22to23_str.r_f23, regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25_str.r_f24, regs.r_f24to27_un.r_f24to27_str.r_f24to25_un.r_f24to25_str.r_f25);
fprintf( out, "%%f26: %+.8e %%f27: %+.8e %%f28: %+.8e %%f29: %+.8e %%f30: %+.8e \n", regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27_str.r_f26, regs.r_f24to27_un.r_f24to27_str.r_f26to27_un.r_f26to27_str.r_f27, regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29_str.r_f28, regs.r_f28to31_un.r_f28to31_str.r_f28to29_un.r_f28to29_str.r_f29, regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31_str.r_f30);
fprintf( out, "%%f31: %+.8e \n", regs.r_f28to31_un.r_f28to31_str.r_f30to31_un.r_f30to31_str.r_f31);
}


/*********** Parameter decoding support ***********/
sint32_t inline decodeeaddr( sint32_t pc )
{
match pc to
| "absoluteA" (op_simm13) => return ((sint32_t)( ~(((sint8_t)((op_simm13>>12)&0x1L)) - 1) << 13) | op_simm13);
| "dispA" (op_rs1, op_simm13) => return (regs.rd[op_rs1] + ((sint32_t)( ~(((sint8_t)((op_simm13>>12)&0x1L)) - 1) << 13) | op_simm13));
| "indirectA" (op_rs1) => return regs.rd[op_rs1];
| "indexA" (op_rs1, op_rs2) => return (regs.rd[op_rs1] + regs.rd[op_rs2]);
else return 0;
endmatch
}
sint32_t inline decodereg_or_imm( sint32_t pc )
{
match pc to
| "imode" (op_simm13) => return ((sint32_t)( ~(((sint8_t)((op_simm13>>12)&0x1L)) - 1) << 13) | op_simm13);
| "rmode" (op_rs2) => return regs.rd[op_rs2];
else return 0;
endmatch
}


/**************** Flag call macros ****************/


/******************* Operations *******************/
void inline executeADD( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = (regs.rd[op_rs1] + op_regorimm);
}

void inline executeADDCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = (regs.rd[op_rs1] + op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = (((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) &  ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))) | (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) &  ! ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) & ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))));
regs.r_CF = ((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) | ( ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & (((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L))))));
}
}

void inline executeADDX( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = ((regs.rd[op_rs1] + op_regorimm) + ((sint32_t)((uint32_t)((uint8_t)(regs.r_CF&0x1L)))));
}

void inline executeADDXCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = ((regs.rd[op_rs1] + op_regorimm) + ((sint32_t)((uint32_t)((uint8_t)(regs.r_CF&0x1L)))));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = (((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) &  ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))) | (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) &  ! ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) & ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))));
regs.r_CF = ((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) | ( ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & (((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L))))));
}
}

void inline executeAND( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] & op_regorimm);
}

void inline executeANDCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] & op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeANDN( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] & ((0 - op_regorimm) - 1));
}

void inline executeANDNCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] & ((0 - op_regorimm) - 1));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeBA( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((1 == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBAA( sint32_t op_reloc )
{
regs.r_pc = op_reloc;
regs.r_npc = (op_reloc + 4);
regs.r_CTI = 1;
}

void inline executeBCC( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_CF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBCCA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_CF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_CF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBCS( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_CF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBCSA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_CF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_CF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_ZF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBEA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_ZF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_ZF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBG( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBGA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBGE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_NF ^ regs.r_OF) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBGEA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_NF ^ regs.r_OF) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_NF ^ regs.r_OF) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBGU( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_CF | regs.r_ZF) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBGUA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_CF | regs.r_ZF) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_CF | regs.r_ZF) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBL( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_NF ^ regs.r_OF) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBLA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_NF ^ regs.r_OF) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_NF ^ regs.r_OF) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBLE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBLEA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBLEU( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_CF | regs.r_ZF) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBLEUA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_CF | regs.r_ZF) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_CF | regs.r_ZF) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBN( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((0 == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBNA( sint32_t op_reloc )
{
regs.r_pc = (regs.r_npc + 4);
regs.r_npc = (regs.r_npc + 8);
regs.r_CTI = 1;
}

void inline executeBNE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_ZF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBNEA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_ZF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_ZF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBNEG( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_NF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBNEGA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_NF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_NF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBPOS( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_NF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBPOSA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_NF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_NF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBVC( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_OF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBVCA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_OF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_OF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBVS( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_OF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeBVSA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_OF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_OF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeCALL__( sint32_t op_reloc )
{
regs.rd[15] = regs.r_pc;
regs.r_pc = regs.r_npc;
regs.r_npc = op_reloc;
regs.r_CTI = 1;
}

void inline executeDLY_RST_IMM( sint8_t op_rs1, sint32_t op_imm, sint8_t op_rd )
{
sint32_t tmp1;
tmp1 = (regs.rd[op_rs1] + op_imm);
regs.rd[8] = regs.rd[24];
regs.rd[9] = regs.rd[25];
regs.rd[10] = regs.rd[26];
regs.rd[11] = regs.rd[27];
regs.rd[12] = regs.rd[28];
regs.rd[13] = regs.rd[29];
regs.rd[op_rd] = tmp1;
}

void inline executeDLY_RST_REG( sint8_t op_rs1, sint8_t op_rs2, sint8_t op_rd )
{
sint32_t tmp1;
tmp1 = (regs.rd[op_rs1] + regs.rd[op_rs2]);
regs.rd[8] = regs.rd[24];
regs.rd[9] = regs.rd[25];
regs.rd[10] = regs.rd[26];
regs.rd[11] = regs.rd[27];
regs.rd[12] = regs.rd[28];
regs.rd[13] = regs.rd[29];
regs.rd[op_rd] = tmp1;
}

void inline executeFABSS( sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = (((*(regs_fds[op_fs2s])) < 0) ? (0 - (*(regs_fds[op_fs2s]))) : (*(regs_fds[op_fs2s])));
}

void inline executeFADDD( sint8_t op_fs1d, sint8_t op_fs2d, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((*(regs_fdd[op_fs1d])) + (*(regs_fdd[op_fs2d])));
}

void inline executeFADDQ( sint8_t op_fs1q, sint8_t op_fs2q, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((*(regs_fdq[op_fs1q])) + (*(regs_fdq[op_fs2q])));
}

void inline executeFADDS( sint8_t op_fs1s, sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((*(regs_fds[op_fs1s])) + (*(regs_fds[op_fs2s])));
}

void inline executeFBA( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((1 == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBAA( sint32_t op_reloc )
{
regs.r_pc = op_reloc;
regs.r_npc = (op_reloc + 4);
regs.r_CTI = 1;
}

void inline executeFBE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_FZF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBEA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_FZF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_FZF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBG( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_FGF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBGA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_FGF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_FGF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBGE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_FGF | regs.r_FZF) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBGEA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_FGF | regs.r_FZF) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_FGF | regs.r_FZF) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBL( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_FLF == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBLA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_FLF == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_FLF == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBLE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_FZF | regs.r_FLF) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBLEA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_FZF | regs.r_FLF) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_FZF | regs.r_FLF) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBLG( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_FGF | regs.r_FLF) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBLGA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_FGF | regs.r_FLF) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_FGF | regs.r_FLF) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBN( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((0 == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBNA( sint32_t op_reloc )
{
regs.r_pc = (regs.r_npc + 4);
regs.r_npc = (regs.r_npc + 8);
regs.r_CTI = 1;
}

void inline executeFBNE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_FZF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBNEA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_FZF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_FZF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBO( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((((regs.r_FZF | regs.r_FGF) | regs.r_FLF) == 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBOA( sint32_t op_reloc )
{
regs.r_pc = ((((regs.r_FZF | regs.r_FGF) | regs.r_FLF) == 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((((regs.r_FZF | regs.r_FGF) | regs.r_FLF) == 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBU( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((((regs.r_FZF | regs.r_FGF) | regs.r_FLF) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUA( sint32_t op_reloc )
{
regs.r_pc = ((((regs.r_FZF | regs.r_FGF) | regs.r_FLF) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((((regs.r_FZF | regs.r_FGF) | regs.r_FLF) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_FGF | regs.r_FLF) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUEA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_FGF | regs.r_FLF) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_FGF | regs.r_FLF) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUG( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_FZF | regs.r_FLF) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUGA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_FZF | regs.r_FLF) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_FZF | regs.r_FLF) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUGE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_FLF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUGEA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_FLF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_FLF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBUL( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = (((regs.r_FZF | regs.r_FGF) != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBULA( sint32_t op_reloc )
{
regs.r_pc = (((regs.r_FZF | regs.r_FGF) != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = (((regs.r_FZF | regs.r_FGF) != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBULE( sint32_t op_reloc )
{
regs.r_pc = regs.r_npc;
regs.r_npc = ((regs.r_FGF != 0) ? (regs.r_npc + 4) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFBULEA( sint32_t op_reloc )
{
regs.r_pc = ((regs.r_FGF != 0) ? (regs.r_npc + 4) : regs.r_npc);
regs.r_npc = ((regs.r_FGF != 0) ? (regs.r_npc + 8) : op_reloc);
regs.r_CTI = 1;
}

void inline executeFCMPD( sint8_t op_fs1d, sint8_t op_fs2d )
{
float64_t tmpd;
tmpd = ((*(regs_fdd[op_fs1d])) - (*(regs_fdd[op_fs2d])));
{regs.r_FZF = (((*(regs_fdd[op_fs1d])) == (*(regs_fdd[op_fs2d]))) ? 1 : 0);
regs.r_FLF = (((*(regs_fdd[op_fs1d])) < (*(regs_fdd[op_fs2d]))) ? 1 : 0);
regs.r_FGF = (((*(regs_fdd[op_fs1d])) > (*(regs_fdd[op_fs2d]))) ? 1 : 0);
}
}

void inline executeFCMPED( sint8_t op_fs1d, sint8_t op_fs2d )
{
float64_t tmpd;
tmpd = ((*(regs_fdd[op_fs1d])) - (*(regs_fdd[op_fs2d])));
{regs.r_FZF = (((*(regs_fdd[op_fs1d])) == (*(regs_fdd[op_fs2d]))) ? 1 : 0);
regs.r_FLF = (((*(regs_fdd[op_fs1d])) < (*(regs_fdd[op_fs2d]))) ? 1 : 0);
regs.r_FGF = (((*(regs_fdd[op_fs1d])) > (*(regs_fdd[op_fs2d]))) ? 1 : 0);
}
}

void inline executeFCMPEQ( sint8_t op_fs1q, sint8_t op_fs2q )
{
float128_t tmpD;
tmpD = ((*(regs_fdq[op_fs1q])) - (*(regs_fdq[op_fs2q])));
{regs.r_FZF = (((*(regs_fdq[op_fs1q])) == (*(regs_fdq[op_fs2q]))) ? 1 : 0);
regs.r_FLF = (((*(regs_fdq[op_fs1q])) < (*(regs_fdq[op_fs2q]))) ? 1 : 0);
regs.r_FGF = (((*(regs_fdq[op_fs1q])) > (*(regs_fdq[op_fs2q]))) ? 1 : 0);
}
}

void inline executeFCMPES( sint8_t op_fs1s, sint8_t op_fs2s )
{
float32_t tmpf;
tmpf = ((*(regs_fds[op_fs1s])) - (*(regs_fds[op_fs2s])));
{regs.r_FZF = (((*(regs_fds[op_fs1s])) == (*(regs_fds[op_fs2s]))) ? 1 : 0);
regs.r_FLF = (((*(regs_fds[op_fs1s])) < (*(regs_fds[op_fs2s]))) ? 1 : 0);
regs.r_FGF = (((*(regs_fds[op_fs1s])) > (*(regs_fds[op_fs2s]))) ? 1 : 0);
}
}

void inline executeFCMPQ( sint8_t op_fs1q, sint8_t op_fs2q )
{
float128_t tmpD;
tmpD = ((*(regs_fdq[op_fs1q])) - (*(regs_fdq[op_fs2q])));
{regs.r_FZF = (((*(regs_fdq[op_fs1q])) == (*(regs_fdq[op_fs2q]))) ? 1 : 0);
regs.r_FLF = (((*(regs_fdq[op_fs1q])) < (*(regs_fdq[op_fs2q]))) ? 1 : 0);
regs.r_FGF = (((*(regs_fdq[op_fs1q])) > (*(regs_fdq[op_fs2q]))) ? 1 : 0);
}
}

void inline executeFCMPS( sint8_t op_fs1s, sint8_t op_fs2s )
{
float32_t tmpf;
tmpf = ((*(regs_fds[op_fs1s])) - (*(regs_fds[op_fs2s])));
{regs.r_FZF = (((*(regs_fds[op_fs1s])) == (*(regs_fds[op_fs2s]))) ? 1 : 0);
regs.r_FLF = (((*(regs_fds[op_fs1s])) < (*(regs_fds[op_fs2s]))) ? 1 : 0);
regs.r_FGF = (((*(regs_fds[op_fs1s])) > (*(regs_fds[op_fs2s]))) ? 1 : 0);
}
}

void inline executeFDIVD( sint8_t op_fs1d, sint8_t op_fs2d, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((*(regs_fdd[op_fs1d])) / (*(regs_fdd[op_fs2d])));
}

void inline executeFDIVQ( sint8_t op_fs1q, sint8_t op_fs2q, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((*(regs_fdq[op_fs1q])) / (*(regs_fdq[op_fs2q])));
}

void inline executeFDIVS( sint8_t op_fs1s, sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((*(regs_fds[op_fs1s])) / (*(regs_fds[op_fs2s])));
}

void inline executeFDMULQ( sint8_t op_fs1q, sint8_t op_fs2q, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((*(regs_fdq[op_fs1q])) * (*(regs_fdq[op_fs2q])));
}

void inline executeFDTOI( sint8_t op_fs2d, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = sint32ToFloat32(((sint32_t)(*(regs_fdd[op_fs2d]))));
}

void inline executeFDTOQ( sint8_t op_fs2d, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((float128_t)(*(regs_fdd[op_fs2d])));
}

void inline executeFDTOS( sint8_t op_fs2d, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((float32_t)(*(regs_fdd[op_fs2d])));
}

void inline executeFITOD( sint8_t op_fs2s, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((float64_t)float32ToSint32((*(regs_fds[op_fs2s]))));
}

void inline executeFITOQ( sint8_t op_fs2s, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((float128_t)float32ToSint32((*(regs_fds[op_fs2s]))));
}

void inline executeFITOS( sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((float32_t)float32ToSint32((*(regs_fds[op_fs2s]))));
}

void inline executeFLUSH( sint32_t op_eaddr )
{

}

void inline executeFMOVS( sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = (*(regs_fds[op_fs2s]));
}

void inline executeFMULD( sint8_t op_fs1d, sint8_t op_fs2d, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((*(regs_fdd[op_fs1d])) * (*(regs_fdd[op_fs2d])));
}

void inline executeFMULQ( sint8_t op_fs1q, sint8_t op_fs2q, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((*(regs_fdq[op_fs1q])) * (*(regs_fdq[op_fs2q])));
}

void inline executeFMULS( sint8_t op_fs1s, sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((*(regs_fds[op_fs1s])) * (*(regs_fds[op_fs2s])));
}

void inline executeFNEGS( sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = (0 - (*(regs_fds[op_fs2s])));
}

void inline executeFQTOD( sint8_t op_fs2q, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((float64_t)(*(regs_fdq[op_fs2q])));
}

void inline executeFQTOI( sint8_t op_fs2q, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = sint32ToFloat32(((sint32_t)(*(regs_fdq[op_fs2q]))));
}

void inline executeFQTOS( sint8_t op_fs2q, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((float32_t)(*(regs_fdq[op_fs2q])));
}

void inline executeFSMULD( sint8_t op_fs1d, sint8_t op_fs2d, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((*(regs_fdd[op_fs1d])) * (*(regs_fdd[op_fs2d])));
}

void inline executeFSQRTD( sint8_t op_fs2d, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = sqrt((*(regs_fdd[op_fs2d])));
}

void inline executeFSQRTQ( sint8_t op_fs2q, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = sqrt((*(regs_fdq[op_fs2q])));
}

void inline executeFSQRTS( sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = sqrt((*(regs_fds[op_fs2s])));
}

void inline executeFSTOD( sint8_t op_fs2s, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((float64_t)(*(regs_fds[op_fs2s])));
}

void inline executeFSTOI( sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = sint32ToFloat32(((sint32_t)(*(regs_fds[op_fs2s]))));
}

void inline executeFSTOQ( sint8_t op_fs2s, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((float128_t)(*(regs_fds[op_fs2s])));
}

void inline executeFSUBD( sint8_t op_fs1d, sint8_t op_fs2d, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = ((*(regs_fdd[op_fs1d])) - (*(regs_fdd[op_fs2d])));
}

void inline executeFSUBQ( sint8_t op_fs1q, sint8_t op_fs2q, sint8_t op_fdq )
{
(*(regs_fdq[op_fdq])) = ((*(regs_fdq[op_fs1q])) - (*(regs_fdq[op_fs2q])));
}

void inline executeFSUBS( sint8_t op_fs1s, sint8_t op_fs2s, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = ((*(regs_fds[op_fs1s])) - (*(regs_fds[op_fs2s])));
}

void inline executeJMPL( sint32_t op_eaddr, sint8_t op_rd )
{
sint32_t tmp;
tmp = op_eaddr;
regs.rd[op_rd] = regs.r_pc;
regs.r_pc = regs.r_npc;
regs.r_npc = tmp;
regs.r_CTI = 1;
}

void inline executeLD( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[op_rd] = getMemsint32_t(op_eaddr) ;
}

void inline executeLDD( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[(( op_rd + 0 ) & 30)- 0] = getMemsint32_t(op_eaddr) ;
regs.rd[((( op_rd + 0 ) & 30) + 1)- 0] = getMemsint32_t((op_eaddr + 4)) ;
}

void inline executeLDDF( sint32_t op_eaddr, sint8_t op_fdd )
{
(*(regs_fdd[op_fdd])) = getMemfloat64_t(op_eaddr) ;
}

void inline executeLDF( sint32_t op_eaddr, sint8_t op_fds )
{
(*(regs_fds[op_fds])) = getMemfloat32_t(op_eaddr) ;
}

void inline executeLDFSR( sint32_t op_eaddr )
{
regs.r_FSR = getMemsint32_t(op_eaddr) ;
}

void inline executeLDSB( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)getMemsint8_t(op_eaddr) );
}

void inline executeLDSH( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)getMemsint16_t(op_eaddr) );
}

void inline executeLDSTUB( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)((uint32_t)((uint8_t)getMemsint8_t(op_eaddr) )));
setMemsint8_t(op_eaddr, (getMemsint8_t(op_eaddr)  | 255)) ;
}

void inline executeLDUB( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)((uint32_t)((uint8_t)getMemsint8_t(op_eaddr) )));
}

void inline executeLDUH( sint32_t op_eaddr, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)((uint32_t)((uint16_t)getMemsint16_t(op_eaddr) )));
}

void inline executeMULSCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
sint32_t tmp2;
tmp = (((sint32_t)(((uint32_t)regs.rd[op_rs1]) >> ((uint32_t)1))) | (((regs.r_NF ^ regs.r_OF) == 1) ? (1 << 31) : 0));
tmp2 = ((((sint8_t)((sint8_t)(regs.r_Y&0x1L))) == 1) ? op_regorimm : 0);
regs.r_Y = (((sint32_t)(((uint32_t)regs.r_Y) >> ((uint32_t)1))) | (regs.rd[op_rs1] << 31));
regs.rd[op_rd] = (tmp + tmp2);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = (((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((tmp2>>31)&0x1L)))) &  ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))) | (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) &  ! ((sint8_t)((sint8_t)((tmp2>>31)&0x1L)))) & ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))));
regs.r_CF = ((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((tmp2>>31)&0x1L)))) | ( ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & (((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((tmp2>>31)&0x1L))))));
}
}

void inline executeNOP(  )
{

}

void inline executeOR( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] | op_regorimm);
}

void inline executeORCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] | op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeORN( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] | ((0 - op_regorimm) - 1));
}

void inline executeORNCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] | ((0 - op_regorimm) - 1));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeRDPSR( sint8_t op_rd )
{
regs.rd[op_rd] = regs.r_PSR;
}

void inline executeRDTBR( sint8_t op_rd )
{
regs.rd[op_rd] = regs.r_TBR;
}

void inline executeRDWIM( sint8_t op_rd )
{
regs.rd[op_rd] = regs.r_WIM;
}

void inline executeRDY( sint8_t op_rd )
{
regs.rd[op_rd] = regs.r_Y;
}

void inline executeRESTORE( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = (regs.rd[op_rs1] + op_regorimm);
regs.rd[8] = regs.rd[24];
regs.rd[9] = regs.rd[25];
regs.rd[10] = regs.rd[26];
regs.rd[11] = regs.rd[27];
regs.rd[12] = regs.rd[28];
regs.rd[13] = regs.rd[29];
regs.rd[14] = regs.rd[30];
regs.rd[15] = regs.rd[31];
regs.rd[op_rd] = tmp;
regs.rd[16] = getMemsint32_t((regs.rd[14] + 0)) ;
regs.rd[17] = getMemsint32_t((regs.rd[14] + 4)) ;
regs.rd[18] = getMemsint32_t((regs.rd[14] + 8)) ;
regs.rd[19] = getMemsint32_t((regs.rd[14] + 12)) ;
regs.rd[20] = getMemsint32_t((regs.rd[14] + 16)) ;
regs.rd[21] = getMemsint32_t((regs.rd[14] + 20)) ;
regs.rd[22] = getMemsint32_t((regs.rd[14] + 24)) ;
regs.rd[23] = getMemsint32_t((regs.rd[14] + 28)) ;
regs.rd[24] = getMemsint32_t((regs.rd[14] + 32)) ;
regs.rd[25] = getMemsint32_t((regs.rd[14] + 36)) ;
regs.rd[26] = getMemsint32_t((regs.rd[14] + 40)) ;
regs.rd[27] = getMemsint32_t((regs.rd[14] + 44)) ;
regs.rd[28] = getMemsint32_t((regs.rd[14] + 48)) ;
regs.rd[29] = getMemsint32_t((regs.rd[14] + 52)) ;
regs.rd[30] = getMemsint32_t((regs.rd[14] + 56)) ;
regs.rd[31] = getMemsint32_t((regs.rd[14] + 60)) ;
regs.rd[op_rd] = tmp;
}

void inline executeRET_IMM_VAL( sint8_t op_rs1, sint32_t op_imm )
{
regs.rd[8] = (regs.rd[op_rs1] + op_imm);
}

void inline executeRET_REG_VAL( sint8_t op_rs1, sint8_t op_rs2 )
{
regs.rd[8] = (regs.rd[op_rs1] + regs.rd[op_rs2]);
}

void inline executeSAVE( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = (regs.rd[op_rs1] + op_regorimm);
setMemsint32_t((regs.rd[14] + 0), regs.rd[16]) ;
setMemsint32_t((regs.rd[14] + 4), regs.rd[17]) ;
setMemsint32_t((regs.rd[14] + 8), regs.rd[18]) ;
setMemsint32_t((regs.rd[14] + 12), regs.rd[19]) ;
setMemsint32_t((regs.rd[14] + 16), regs.rd[20]) ;
setMemsint32_t((regs.rd[14] + 20), regs.rd[21]) ;
setMemsint32_t((regs.rd[14] + 24), regs.rd[22]) ;
setMemsint32_t((regs.rd[14] + 28), regs.rd[23]) ;
setMemsint32_t((regs.rd[14] + 32), regs.rd[24]) ;
setMemsint32_t((regs.rd[14] + 36), regs.rd[25]) ;
setMemsint32_t((regs.rd[14] + 40), regs.rd[26]) ;
setMemsint32_t((regs.rd[14] + 44), regs.rd[27]) ;
setMemsint32_t((regs.rd[14] + 48), regs.rd[28]) ;
setMemsint32_t((regs.rd[14] + 52), regs.rd[29]) ;
setMemsint32_t((regs.rd[14] + 56), regs.rd[30]) ;
setMemsint32_t((regs.rd[14] + 60), regs.rd[31]) ;
regs.rd[24] = regs.rd[8];
regs.rd[25] = regs.rd[9];
regs.rd[26] = regs.rd[10];
regs.rd[27] = regs.rd[11];
regs.rd[28] = regs.rd[12];
regs.rd[29] = regs.rd[13];
regs.rd[30] = regs.rd[14];
regs.rd[31] = regs.rd[15];
regs.rd[op_rd] = tmp;
}

void inline executeSDIV( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint64_t tmpl;
tmpl = ((((sint64_t)((uint64_t)((uint32_t)regs.r_Y))) << 32) | ((sint64_t)((uint64_t)((uint32_t)regs.rd[op_rs1]))));
regs.rd[op_rd] = ((sint32_t)(tmpl / ((sint64_t)op_regorimm)));
}

void inline executeSDIVCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint64_t tmpl;
tmpl = ((((sint64_t)((uint64_t)((uint32_t)regs.r_Y))) << 32) | ((sint64_t)((uint64_t)((uint32_t)regs.rd[op_rs1]))));
regs.rd[op_rd] = ((sint32_t)(tmpl / ((sint64_t)op_regorimm)));
}

void inline executeSDIVCCQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] / op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_CF = 0;
}
}

void inline executeSDIVQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] / op_regorimm);
}

void inline executeSETHI( sint32_t op_val, sint8_t op_rd )
{
regs.rd[op_rd] = op_val;
}

void inline executeSLL( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] << op_regorimm);
}

void inline executeSMUL( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
sint64_t tmpl;
tmp = regs.rd[op_rs1];
tmpl = (((sint64_t)regs.rd[op_rs1]) * ((sint64_t)op_regorimm));
regs.rd[op_rd] = ((sint32_t)tmpl);
regs.r_Y = ((sint32_t)((sint32_t)((tmpl>>32)&0xffffffffL)));
}

void inline executeSMULCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
sint64_t tmpl;
tmp = regs.rd[op_rs1];
tmpl = (((sint64_t)regs.rd[op_rs1]) * ((sint64_t)op_regorimm));
regs.rd[op_rd] = ((sint32_t)tmpl);
regs.r_Y = ((sint32_t)((sint32_t)((tmpl>>32)&0xffffffffL)));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeSMULCCQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] * op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeSMULQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] * op_regorimm);
}

void inline executeSRA( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] >> op_regorimm);
}

void inline executeSRL( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)(((uint32_t)regs.rd[op_rs1]) >> ((uint32_t)op_regorimm)));
}

void inline executeST( sint8_t op_rd, sint32_t op_eaddr )
{
setMemsint32_t(op_eaddr, regs.rd[op_rd]) ;
}

void inline executeSTB( sint8_t op_rd, sint32_t op_eaddr )
{
setMemsint8_t(op_eaddr, ((sint8_t)regs.rd[op_rd])) ;
}

void inline executeSTBAR(  )
{

}

void inline executeSTD( sint8_t op_rd, sint32_t op_eaddr )
{
setMemsint32_t(op_eaddr, regs.rd[(( op_rd + 0 ) & 30) - 0]) ;
setMemsint32_t((op_eaddr + 4), regs.rd[((( op_rd + 0 ) & 30) + 1) - 0]) ;
}

void inline executeSTDF( sint8_t op_fdd, sint32_t op_eaddr )
{
setMemfloat64_t(op_eaddr, (*(regs_fdd[op_fdd]))) ;
}

void inline executeSTD_RET(  )
{
regs.rd[8] = regs.rd[24];
}

void inline executeSTF( sint8_t op_fds, sint32_t op_eaddr )
{
setMemfloat32_t(op_eaddr, (*(regs_fds[op_fds]))) ;
}

void inline executeSTFSR( sint32_t op_eaddr )
{
setMemsint32_t(op_eaddr, regs.r_FSR) ;
}

void inline executeSTH( sint8_t op_rd, sint32_t op_eaddr )
{
setMemsint16_t(op_eaddr, ((sint16_t)regs.rd[op_rd])) ;
}

void inline executeSUB( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = (regs.rd[op_rs1] - op_regorimm);
}

void inline executeSUBCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = (regs.rd[op_rs1] - op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = (((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) &  ! ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) &  ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))) | (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) & ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))));
regs.r_CF = (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) | (((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & ( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L))))));
}
}

void inline executeSUBX( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = ((regs.rd[op_rs1] - op_regorimm) - ((sint32_t)((uint32_t)((uint8_t)(regs.r_CF&0x1L)))));
}

void inline executeSUBXCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = ((regs.rd[op_rs1] - op_regorimm) - ((sint32_t)((uint32_t)((uint8_t)(regs.r_CF&0x1L)))));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = (((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) &  ! ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) &  ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))) | (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) & ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)))));
regs.r_CF = (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) | (((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & ( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L))))));
}
}

void inline executeSWAP( sint32_t op_eaddr, sint8_t op_rd )
{
sint32_t tmp1;
tmp1 = regs.rd[op_rd];
regs.rd[op_rd] = getMemsint32_t(op_eaddr) ;
setMemsint32_t(op_eaddr, tmp1) ;
}

void inline executeTA( sint32_t op_eaddr )
{
doFlagTRAP((1 == 1), (op_eaddr + 128)) ;
}

void inline executeTADDCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = (regs.rd[op_rs1] + op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_CF = ((((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) | ( ! ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & (((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L))))));
}
}

void inline executeTCC( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_CF != 1), (op_eaddr + 128)) ;
}

void inline executeTCS( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_CF == 1), (op_eaddr + 128)) ;
}

void inline executeTE( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_ZF == 1), (op_eaddr + 128)) ;
}

void inline executeTG( sint32_t op_eaddr )
{
doFlagTRAP(((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) != 1), (op_eaddr + 128)) ;
}

void inline executeTGE( sint32_t op_eaddr )
{
doFlagTRAP(((regs.r_NF ^ regs.r_OF) != 1), (op_eaddr + 128)) ;
}

void inline executeTGU( sint32_t op_eaddr )
{
doFlagTRAP(((regs.r_CF | regs.r_ZF) != 1), (op_eaddr + 128)) ;
}

void inline executeTL( sint32_t op_eaddr )
{
doFlagTRAP(((regs.r_NF ^ regs.r_OF) == 1), (op_eaddr + 128)) ;
}

void inline executeTLE( sint32_t op_eaddr )
{
doFlagTRAP(((regs.r_ZF | (regs.r_NF ^ regs.r_OF)) == 1), (op_eaddr + 128)) ;
}

void inline executeTLEU( sint32_t op_eaddr )
{
doFlagTRAP(((regs.r_CF | regs.r_ZF) == 1), (op_eaddr + 128)) ;
}

void inline executeTN( sint32_t op_eaddr )
{
doFlagTRAP((0 == 1), (op_eaddr + 128)) ;
}

void inline executeTNE( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_ZF != 1), (op_eaddr + 128)) ;
}

void inline executeTNEG( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_NF == 1), (op_eaddr + 128)) ;
}

void inline executeTPOS( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_NF != 1), (op_eaddr + 128)) ;
}

void inline executeTSUBCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
tmp = regs.rd[op_rs1];
regs.rd[op_rd] = (regs.rd[op_rs1] - op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_CF = (( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) & ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L)))) | (((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L))) & ( ! ((sint8_t)((sint8_t)((tmp>>31)&0x1L))) | ((sint8_t)((sint8_t)((op_regorimm>>31)&0x1L))))));
}
}

void inline executeTVC( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_OF != 1), (op_eaddr + 128)) ;
}

void inline executeTVS( sint32_t op_eaddr )
{
doFlagTRAP((regs.r_OF == 1), (op_eaddr + 128)) ;
}

void inline executeUDIV( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint64_t tmpl;
tmpl = ((((sint64_t)((uint64_t)((uint32_t)regs.r_Y))) << 32) | ((sint64_t)((uint64_t)((uint32_t)regs.rd[op_rs1]))));
regs.rd[op_rd] = ((sint32_t)((uint32_t)((uint64_t)((sint64_t)(((uint64_t)tmpl) / ((uint64_t)((sint64_t)((uint64_t)((uint32_t)op_regorimm)))))))));
}

void inline executeUDIVCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint64_t tmpl;
tmpl = ((((sint64_t)((uint64_t)((uint32_t)regs.r_Y))) << 32) | ((sint64_t)((uint64_t)((uint32_t)regs.rd[op_rs1]))));
regs.rd[op_rd] = ((sint32_t)((uint32_t)((uint64_t)((sint64_t)(((uint64_t)tmpl) / ((uint64_t)((sint64_t)((uint64_t)((uint32_t)op_regorimm)))))))));
}

void inline executeUDIVCCQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)(((uint32_t)regs.rd[op_rs1]) / ((uint32_t)op_regorimm)));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_CF = 0;
}
}

void inline executeUDIVQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)(((uint32_t)regs.rd[op_rs1]) / ((uint32_t)op_regorimm)));
}

void inline executeUMUL( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
sint64_t tmpl;
tmp = regs.rd[op_rs1];
tmpl = ((sint64_t)(((uint64_t)((sint64_t)((uint64_t)((uint32_t)regs.rd[op_rs1])))) * ((uint64_t)((sint64_t)((uint64_t)((uint32_t)op_regorimm))))));
regs.rd[op_rd] = ((sint32_t)tmpl);
regs.r_Y = ((sint32_t)((sint32_t)((tmpl>>32)&0xffffffffL)));
}

void inline executeUMULCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
sint32_t tmp;
sint64_t tmpl;
tmp = regs.rd[op_rs1];
tmpl = ((sint64_t)(((uint64_t)((sint64_t)((uint64_t)((uint32_t)regs.rd[op_rs1])))) * ((uint64_t)((sint64_t)((uint64_t)((uint32_t)op_regorimm))))));
regs.rd[op_rd] = ((sint32_t)tmpl);
regs.r_Y = ((sint32_t)((sint32_t)((tmpl>>32)&0xffffffffL)));
}

void inline executeUMULCCQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)(((uint32_t)regs.rd[op_rs1]) * ((uint32_t)op_regorimm)));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeUMULQ( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = ((sint32_t)(((uint32_t)regs.rd[op_rs1]) * ((uint32_t)op_regorimm)));
}

void inline executeUMULTCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeWRPSR( sint8_t op_rs1, sint32_t op_regorimm )
{
regs.r_PSR = (regs.rd[op_rs1] ^ op_regorimm);
}

void inline executeWRTBR( sint8_t op_rs1, sint32_t op_regorimm )
{
regs.r_TBR = (regs.r_TBR | ((regs.rd[op_rs1] ^ op_regorimm) << 12));
}

void inline executeWRWIM( sint8_t op_rs1, sint32_t op_regorimm )
{
regs.r_WIM = (regs.rd[op_rs1] ^ op_regorimm);
}

void inline executeWRY( sint8_t op_rs1, sint32_t op_regorimm )
{
regs.r_Y = (regs.rd[op_rs1] ^ op_regorimm);
}

void inline executeXNOR( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] ^ ((0 - op_regorimm) - 1));
}

void inline executeXNORCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] ^ ((0 - op_regorimm) - 1));
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}

void inline executeXOR( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] ^ op_regorimm);
}

void inline executeXORCC( sint8_t op_rs1, sint32_t op_regorimm, sint8_t op_rd )
{
regs.rd[op_rd] = (regs.rd[op_rs1] ^ op_regorimm);
{regs.r_NF = ((sint8_t)((sint8_t)((regs.rd[op_rd]>>31)&0x1L)));
regs.r_ZF = ((regs.rd[op_rd] == 0) ? 1 : 0);
regs.r_OF = 0;
regs.r_CF = 0;
}
}



sint32_t inline execute( sint32_t pc )
{
sint32_t nextPC;
match [nextPC] pc to
| "ADD" (op_rs1, op_regorimm, op_rd) => executeADD( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ADDX" (op_rs1, op_regorimm, op_rd) => executeADDX( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "WRY" (op_rs1, op_regorimm) => executeWRY( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ) );
| "ADDXcc" (op_rs1, op_regorimm, op_rd) => executeADDXCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ADDcc" (op_rs1, op_regorimm, op_rd) => executeADDCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "AND" (op_rs1, op_regorimm, op_rd) => executeAND( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ANDN" (op_rs1, op_regorimm, op_rd) => executeANDN( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ANDNcc" (op_rs1, op_regorimm, op_rd) => executeANDNCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ANDcc" (op_rs1, op_regorimm, op_rd) => executeANDCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "BA" (op_reloc) => executeBA( op_reloc );
| "BA,a" (op_reloc) => executeBAA( op_reloc );
| "BCC" (op_reloc) => executeBCC( op_reloc );
| "BCC,a" (op_reloc) => executeBCCA( op_reloc );
| "BCS" (op_reloc) => executeBCS( op_reloc );
| "BCS,a" (op_reloc) => executeBCSA( op_reloc );
| "BE" (op_reloc) => executeBE( op_reloc );
| "BE,a" (op_reloc) => executeBEA( op_reloc );
| "BG" (op_reloc) => executeBG( op_reloc );
| "BG,a" (op_reloc) => executeBGA( op_reloc );
| "BGE" (op_reloc) => executeBGE( op_reloc );
| "BGE,a" (op_reloc) => executeBGEA( op_reloc );
| "BGU" (op_reloc) => executeBGU( op_reloc );
| "BGU,a" (op_reloc) => executeBGUA( op_reloc );
| "BL" (op_reloc) => executeBL( op_reloc );
| "BL,a" (op_reloc) => executeBLA( op_reloc );
| "BLE" (op_reloc) => executeBLE( op_reloc );
| "BLE,a" (op_reloc) => executeBLEA( op_reloc );
| "BLEU" (op_reloc) => executeBLEU( op_reloc );
| "BLEU,a" (op_reloc) => executeBLEUA( op_reloc );
| "BN" (op_reloc) => executeBN( op_reloc );
| "BN,a" (op_reloc) => executeBNA( op_reloc );
| "BNE" (op_reloc) => executeBNE( op_reloc );
| "BNE,a" (op_reloc) => executeBNEA( op_reloc );
| "BNEG" (op_reloc) => executeBNEG( op_reloc );
| "BNEG,a" (op_reloc) => executeBNEGA( op_reloc );
| "BPOS" (op_reloc) => executeBPOS( op_reloc );
| "BPOS,a" (op_reloc) => executeBPOSA( op_reloc );
| "BVC" (op_reloc) => executeBVC( op_reloc );
| "BVC,a" (op_reloc) => executeBVCA( op_reloc );
| "BVS" (op_reloc) => executeBVS( op_reloc );
| "BVS,a" (op_reloc) => executeBVSA( op_reloc );
| "FABSs" (op_fs2s, op_fds) => executeFABSS( ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FADDd" (op_fs1d, op_fs2d, op_fdd) => executeFADDD( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d), ((sint8_t)op_fdd) );
| "FADDq" (op_fs1q, op_fs2q, op_fdq) => executeFADDQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q), ((sint8_t)op_fdq) );
| "FADDs" (op_fs1s, op_fs2s, op_fds) => executeFADDS( ((sint8_t)op_fs1s), ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FBA" (op_reloc) => executeFBA( op_reloc );
| "FBA,a" (op_reloc) => executeFBAA( op_reloc );
| "FBE" (op_reloc) => executeFBE( op_reloc );
| "FBE,a" (op_reloc) => executeFBEA( op_reloc );
| "FBG" (op_reloc) => executeFBG( op_reloc );
| "FBG,a" (op_reloc) => executeFBGA( op_reloc );
| "FBGE" (op_reloc) => executeFBGE( op_reloc );
| "FBGE,a" (op_reloc) => executeFBGEA( op_reloc );
| "FBL" (op_reloc) => executeFBL( op_reloc );
| "FBL,a" (op_reloc) => executeFBLA( op_reloc );
| "FBLE" (op_reloc) => executeFBLE( op_reloc );
| "FBLE,a" (op_reloc) => executeFBLEA( op_reloc );
| "FBLG" (op_reloc) => executeFBLG( op_reloc );
| "FBLG,a" (op_reloc) => executeFBLGA( op_reloc );
| "FBN" (op_reloc) => executeFBN( op_reloc );
| "FBN,a" (op_reloc) => executeFBNA( op_reloc );
| "FBNE" (op_reloc) => executeFBNE( op_reloc );
| "FBNE,a" (op_reloc) => executeFBNEA( op_reloc );
| "FBO" (op_reloc) => executeFBO( op_reloc );
| "FBO,a" (op_reloc) => executeFBOA( op_reloc );
| "FBU" (op_reloc) => executeFBU( op_reloc );
| "FBU,a" (op_reloc) => executeFBUA( op_reloc );
| "FBUE" (op_reloc) => executeFBUE( op_reloc );
| "FBUE,a" (op_reloc) => executeFBUEA( op_reloc );
| "FBUG" (op_reloc) => executeFBUG( op_reloc );
| "FBUG,a" (op_reloc) => executeFBUGA( op_reloc );
| "FBUGE" (op_reloc) => executeFBUGE( op_reloc );
| "FBUGE,a" (op_reloc) => executeFBUGEA( op_reloc );
| "FBUL" (op_reloc) => executeFBUL( op_reloc );
| "FBUL,a" (op_reloc) => executeFBULA( op_reloc );
| "FBULE" (op_reloc) => executeFBULE( op_reloc );
| "FBULE,a" (op_reloc) => executeFBULEA( op_reloc );
| "FCMPEd" (op_fs1d, op_fs2d) => executeFCMPED( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d) );
| "FCMPEq" (op_fs1q, op_fs2q) => executeFCMPEQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q) );
| "FCMPEs" (op_fs1s, op_fs2s) => executeFCMPES( ((sint8_t)op_fs1s), ((sint8_t)op_fs2s) );
| "FCMPd" (op_fs1d, op_fs2d) => executeFCMPD( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d) );
| "FCMPq" (op_fs1q, op_fs2q) => executeFCMPQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q) );
| "FCMPs" (op_fs1s, op_fs2s) => executeFCMPS( ((sint8_t)op_fs1s), ((sint8_t)op_fs2s) );
| "FDIVd" (op_fs1d, op_fs2d, op_fdd) => executeFDIVD( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d), ((sint8_t)op_fdd) );
| "FDIVq" (op_fs1q, op_fs2q, op_fdq) => executeFDIVQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q), ((sint8_t)op_fdq) );
| "FDIVs" (op_fs1s, op_fs2s, op_fds) => executeFDIVS( ((sint8_t)op_fs1s), ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FLUSH" (op_eaddr) => executeFLUSH( decodeeaddr( op_eaddr ) );
| "FMOVs" (op_fs2s, op_fds) => executeFMOVS( ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FMULd" (op_fs1d, op_fs2d, op_fdd) => executeFMULD( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d), ((sint8_t)op_fdd) );
| "FMULq" (op_fs1q, op_fs2q, op_fdq) => executeFMULQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q), ((sint8_t)op_fdq) );
| "FMULs" (op_fs1s, op_fs2s, op_fds) => executeFMULS( ((sint8_t)op_fs1s), ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FNEGs" (op_fs2s, op_fds) => executeFNEGS( ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FSQRTd" (op_fs2d, op_fdd) => executeFSQRTD( ((sint8_t)op_fs2d), ((sint8_t)op_fdd) );
| "FSQRTq" (op_fs2q, op_fdq) => executeFSQRTQ( ((sint8_t)op_fs2q), ((sint8_t)op_fdq) );
| "FSQRTs" (op_fs2s, op_fds) => executeFSQRTS( ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FSUBd" (op_fs1d, op_fs2d, op_fdd) => executeFSUBD( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d), ((sint8_t)op_fdd) );
| "FSUBq" (op_fs1q, op_fs2q, op_fdq) => executeFSUBQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q), ((sint8_t)op_fdq) );
| "FSUBs" (op_fs1s, op_fs2s, op_fds) => executeFSUBS( ((sint8_t)op_fs1s), ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FdMULq" (op_fs1q, op_fs2q, op_fdq) => executeFDMULQ( ((sint8_t)op_fs1q), ((sint8_t)op_fs2q), ((sint8_t)op_fdq) );
| "FdTOi" (op_fs2d, op_fds) => executeFDTOI( ((sint8_t)op_fs2d), ((sint8_t)op_fds) );
| "FdTOq" (op_fs2d, op_fdq) => executeFDTOQ( ((sint8_t)op_fs2d), ((sint8_t)op_fdq) );
| "FdTOs" (op_fs2d, op_fds) => executeFDTOS( ((sint8_t)op_fs2d), ((sint8_t)op_fds) );
| "FiTOd" (op_fs2s, op_fdd) => executeFITOD( ((sint8_t)op_fs2s), ((sint8_t)op_fdd) );
| "FiTOq" (op_fs2s, op_fdq) => executeFITOQ( ((sint8_t)op_fs2s), ((sint8_t)op_fdq) );
| "FiTOs" (op_fs2s, op_fds) => executeFITOS( ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FqTOd" (op_fs2q, op_fdd) => executeFQTOD( ((sint8_t)op_fs2q), ((sint8_t)op_fdd) );
| "FqTOi" (op_fs2q, op_fds) => executeFQTOI( ((sint8_t)op_fs2q), ((sint8_t)op_fds) );
| "FqTOs" (op_fs2q, op_fds) => executeFQTOS( ((sint8_t)op_fs2q), ((sint8_t)op_fds) );
| "FsMULd" (op_fs1d, op_fs2d, op_fdd) => executeFSMULD( ((sint8_t)op_fs1d), ((sint8_t)op_fs2d), ((sint8_t)op_fdd) );
| "FsTOd" (op_fs2s, op_fdd) => executeFSTOD( ((sint8_t)op_fs2s), ((sint8_t)op_fdd) );
| "FsTOi" (op_fs2s, op_fds) => executeFSTOI( ((sint8_t)op_fs2s), ((sint8_t)op_fds) );
| "FsTOq" (op_fs2s, op_fdq) => executeFSTOQ( ((sint8_t)op_fs2s), ((sint8_t)op_fdq) );
| "JMPL" (op_eaddr, op_rd) => executeJMPL( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LD" (op_eaddr, op_rd) => executeLD( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LDD" (op_eaddr, op_rd) => executeLDD( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LDDF" (op_eaddr, op_fdd) => executeLDDF( decodeeaddr( op_eaddr ), ((sint8_t)op_fdd) );
| "LDF" (op_eaddr, op_fds) => executeLDF( decodeeaddr( op_eaddr ), ((sint8_t)op_fds) );
| "LDFSR" (op_eaddr) => executeLDFSR( decodeeaddr( op_eaddr ) );
| "LDSB" (op_eaddr, op_rd) => executeLDSB( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LDSH" (op_eaddr, op_rd) => executeLDSH( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LDSTUB" (op_eaddr, op_rd) => executeLDSTUB( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LDUB" (op_eaddr, op_rd) => executeLDUB( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "LDUH" (op_eaddr, op_rd) => executeLDUH( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "MULScc" (op_rs1, op_regorimm, op_rd) => executeMULSCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "NOP" () => executeNOP(  );
| "OR" (op_rs1, op_regorimm, op_rd) => executeOR( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ORN" (op_rs1, op_regorimm, op_rd) => executeORN( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ORNcc" (op_rs1, op_regorimm, op_rd) => executeORNCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ORcc" (op_rs1, op_regorimm, op_rd) => executeORCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "RDPSR" (op_rd) => executeRDPSR( ((sint8_t)op_rd) );
| "RDTBR" (op_rd) => executeRDTBR( ((sint8_t)op_rd) );
| "RDWIM" (op_rd) => executeRDWIM( ((sint8_t)op_rd) );
| "RDY" (op_rd) => executeRDY( ((sint8_t)op_rd) );
| "RESTORE" (op_rs1, op_regorimm, op_rd) => executeRESTORE( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SAVE" (op_rs1, op_regorimm, op_rd) => executeSAVE( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SDIV" (op_rs1, op_regorimm, op_rd) => executeSDIV( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SDIVcc" (op_rs1, op_regorimm, op_rd) => executeSDIVCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SLL" (op_rs1, op_regorimm, op_rd) => executeSLL( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SMUL" (op_rs1, op_regorimm, op_rd) => executeSMUL( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SMULcc" (op_rs1, op_regorimm, op_rd) => executeSMULCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SRA" (op_rs1, op_regorimm, op_rd) => executeSRA( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SRL" (op_rs1, op_regorimm, op_rd) => executeSRL( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "ST" (op_rd, op_eaddr) => executeST( ((sint8_t)op_rd), decodeeaddr( op_eaddr ) );
| "STB" (op_rd, op_eaddr) => executeSTB( ((sint8_t)op_rd), decodeeaddr( op_eaddr ) );
| "STBAR" () => executeSTBAR(  );
| "STD" (op_rd, op_eaddr) => executeSTD( ((sint8_t)op_rd), decodeeaddr( op_eaddr ) );
| "STDF" (op_fdd, op_eaddr) => executeSTDF( ((sint8_t)op_fdd), decodeeaddr( op_eaddr ) );
| "STF" (op_fds, op_eaddr) => executeSTF( ((sint8_t)op_fds), decodeeaddr( op_eaddr ) );
| "STFSR" (op_eaddr) => executeSTFSR( decodeeaddr( op_eaddr ) );
| "STH" (op_rd, op_eaddr) => executeSTH( ((sint8_t)op_rd), decodeeaddr( op_eaddr ) );
| "SUB" (op_rs1, op_regorimm, op_rd) => executeSUB( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SUBX" (op_rs1, op_regorimm, op_rd) => executeSUBX( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SUBXcc" (op_rs1, op_regorimm, op_rd) => executeSUBXCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SUBcc" (op_rs1, op_regorimm, op_rd) => executeSUBCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "SWAP." (op_eaddr, op_rd) => executeSWAP( decodeeaddr( op_eaddr ), ((sint8_t)op_rd) );
| "TA" (op_eaddr) => executeTA( decodeeaddr( op_eaddr ) );
| "TADDcc" (op_rs1, op_regorimm, op_rd) => executeTADDCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "TCC" (op_eaddr) => executeTCC( decodeeaddr( op_eaddr ) );
| "TCS" (op_eaddr) => executeTCS( decodeeaddr( op_eaddr ) );
| "TE" (op_eaddr) => executeTE( decodeeaddr( op_eaddr ) );
| "TG" (op_eaddr) => executeTG( decodeeaddr( op_eaddr ) );
| "TGE" (op_eaddr) => executeTGE( decodeeaddr( op_eaddr ) );
| "TGU" (op_eaddr) => executeTGU( decodeeaddr( op_eaddr ) );
| "TL" (op_eaddr) => executeTL( decodeeaddr( op_eaddr ) );
| "TLE" (op_eaddr) => executeTLE( decodeeaddr( op_eaddr ) );
| "TLEU" (op_eaddr) => executeTLEU( decodeeaddr( op_eaddr ) );
| "TN" (op_eaddr) => executeTN( decodeeaddr( op_eaddr ) );
| "TNE" (op_eaddr) => executeTNE( decodeeaddr( op_eaddr ) );
| "TNEG" (op_eaddr) => executeTNEG( decodeeaddr( op_eaddr ) );
| "TPOS" (op_eaddr) => executeTPOS( decodeeaddr( op_eaddr ) );
| "TSUBcc" (op_rs1, op_regorimm, op_rd) => executeTSUBCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "TVC" (op_eaddr) => executeTVC( decodeeaddr( op_eaddr ) );
| "TVS" (op_eaddr) => executeTVS( decodeeaddr( op_eaddr ) );
| "UDIV" (op_rs1, op_regorimm, op_rd) => executeUDIV( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "UDIVcc" (op_rs1, op_regorimm, op_rd) => executeUDIVCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "UMUL" (op_rs1, op_regorimm, op_rd) => executeUMUL( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "UMULcc" (op_rs1, op_regorimm, op_rd) => executeUMULCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "WRPSR" (op_rs1, op_regorimm) => executeWRPSR( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ) );
| "WRTBR" (op_rs1, op_regorimm) => executeWRTBR( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ) );
| "WRWIM" (op_rs1, op_regorimm) => executeWRWIM( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ) );
| "XNOR" (op_rs1, op_regorimm, op_rd) => executeXNOR( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "XNORcc" (op_rs1, op_regorimm, op_rd) => executeXNORCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "XOR" (op_rs1, op_regorimm, op_rd) => executeXOR( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "XORcc" (op_rs1, op_regorimm, op_rd) => executeXORCC( ((sint8_t)op_rs1), decodereg_or_imm( op_regorimm ), ((sint8_t)op_rd) );
| "call__" (op_reloc) => executeCALL__( op_reloc );
| "sethi" (op_val, op_rd) => executeSETHI( op_val, ((sint8_t)op_rd) );
else unimplemented(pc);
endmatch
return nextPC;
}


/**************** Global Functions ****************/
void executeOneInstruction()
{
    regs.rd[0] = 0;
regs.r_CTI = 0;
execute(regs.r_pc);
regs.r_pc = ((regs.r_CTI == 0) ? regs.r_npc : regs.r_pc);
regs.r_npc = ((regs.r_CTI == 0) ? (regs.r_npc + 4) : regs.r_npc);

}

void run( )
{
    while(1) {
#ifndef NDEBUG
        icount++;
        if( debug ) {
            char buf[80];
            sprintDisassembleInst( regs.r_pc, buf, sizeof(buf) );
            dumpMainRegisters( stderr );
            fprintf( stderr, "%5ld|%s\n", icount, buf );
        }
#endif
        executeOneInstruction();
    }
}




